Artificial Intelligence-Driven Network-on-Chip Design Space Exploration: Neural Network Architectures for Design
arXiv:2512.07877v1 Announce Type: new Abstract: Network-on-Chip (NoC) design requires exploring a high-dimensional configuration space to satisfy stringent throughput requirements and latency constraints.Traditional design space exploration techniques are often slow and struggle to handle complex, non-linear parameter interactions.This work presents a…
