In 2020 researchers fine-tuned a GPT-2 model to design fragments of logic circuits; in 2023 researchers used GPT-4 to help design an 8-bit processor with a novel instruction set; by 2024, a variety of LLMs could design and test chips with basic functionality, like dice rolls (though often these were flawed).Now Verkor.io, an AI chip design start-up, claims a bigger milestone: a RISC-V CPU core designed entirely by an agentic AI system. The CPU, dubbed VerCore, has a clock speed of 1.5 gigahertz and performance similar to a 2011-era laptop CPU. Suresh Krishna, co-founder at Verkor.io, says the team’s key claim is that this approach is more effective than using only specialized AI systems for specialized tasks within the overall design process. “ What we learned is that the better approach is to let the AI agent solve the whole problem,” he says.Bringing human workflows to agentic AIVerkor.io’s agentic system is called Design Conductor, and it’s not itself an AI model. It’s a harness for large language models (LLMs). A harness is software that forces an AI agent to proceed through structured steps. In this case, the steps are like those a team of human chip architects would follow: design, implementation, testing, and so on. The harness also manages sub-agents and a database of related files.That means it can work autonomously with only an initial prompt—in this case a 219-word design specification—from the user. (The prompt is published in the Design Conductor paper.) It outputs a Graphic Design System II (GDSII) file, which can be used in existing electronic design automation (EDA) software.Synopsys and Cadence, two major players in EDA software, also have agentic AI tools. These allow chip architects to automate some tasks with AI agents. Design Conductor is different because it’s built to handle chip design from spec to completion with full autonomy, something major EDA companies have not yet touted.Ravi Krishna, founding engineer at Verkor.io, says Design Conductor’s workflow is “mirrored after the traditional process a human engineer might use.” It analyzes the specification, then writes and debugs a Register-Transfer Level (RTL) file (an abstraction of the CPU’s data flow) before iterating through sub-tasks like power delivery, signal timings, and layout, which are again checked against the specification. Some tasks, like layout, call tools to assist the agent. “It’s an iterative system.”The system took 12 hours to create the VerCore design. That’s not long, but, because it uses AI agents, one might imagine it taking more or less time based on the number of agents thrown at it. However, Ravi Krishna says it’s not that simple, because some design tasks aren’t easily parallelized. However, the general improvement of AI models over time has proven essential. “I remember that around the middle of last year, we tried to build a floating-point multiplier with the models of that time. It was slightly beyond what they could do,” says Ravi Krishna. VerCore—designed in December 2025— represents an increase in capability since then. “If it can’t do it today, it’ll do it in six months,” he says. “I don’t know if that’s a scary thing or a good thing.”A first for AI chip designVerCore uses the RISC-V instruction set architecture (ISA), a popular open-standard ISA that’s beginning to break out of niche applications, like storage controllers, into SoCs that can power laptops or smartphones. The CPU’s exact clock speed is 1.48GHz and it achieved ascore of 3,261 on the CoreMark processor core benchmark. Verkor says this puts VerCore’s performance in line with the CPU core performance of Intel’s Celeron SU2300. Whether that sounds impressive depends on your perspective. The Celeron SU2300, which arrived in 2011, uses Intel’s Penryn CPU architecture, which debuted in November of 2007. In other words, VerCore is no threat to leading-edge CPUs, but it’s notable for two reasons.VerCore is the first RISC-V CPU core designed by an AI agent. Previous examples of AI chip design presented portions of a design but didn’t present a complete core. Ravi Krishna says the company wanted to target a design that an AI agent hadn’t previously accomplished. “From the perspective of trying to push the limits of what AI models can do, that was interesting to us,” he says.And while VerCore’s theoretical performance has limits, it’s enough to suggest the design could be useful. Indeed, RISC-V is popular because it provides an ISA that’s free to use (RISC-V is an open standard). RISC-V chips generally aren’t as quick as their x86 and Arm peers, but they’re less expensive. There’s one final caveat worth mentioning; the chip has not been physically produced. VerCore was verified in simulation with Spike, the reference RISC-V ISA simulator, and laid out using the open-source ASAP7 PDK, an academic design kit that simulates a 7nm production node. Both tools are commonly used for RISC-V design. VerCore says its CPU can run a variant of uCLinux in simulation. Skeptics will have a chance to judge for themselves. Verkor.io plans to release design files at the end of April. This will include the VerCore CPU and several other designs recently completed by the AI agent system Verkor also plans to show an FPGA implementation of VerCore at DAC, the leading electronic design automation conference.Should chip designers worry about AI agents taking their jobs?An AI chip designer that can bang out a CPU in 12 hours might seem like troubling news for flesh-and-blood engineers, but Design Conductor has its limitations. The team at Verkor.io say that despite improvements, LLMs still lack the intuition a human can bring.Design Conductor can fall down “rabbit holes” that a human engineer would avoid. In one instance the agent made a mistake in timing, meaning that data was not moved across the CPU in agreement with its clock cycle. The model didn’t recognize the cause and made broad changes while hunting for the fix. It did eventually find a fix, but only after reaching many dead ends. “Basically, we are trading off experience for compute,” says David Chin, vice president of engineering at the startup.Suresh Krishna concurs and adds that Design Conductor’s brute-force approach is likely to become less efficient as agentic systems tackle more complex designs. “It’s a non-linear design space, so the compute grows very quickly,” he says. “As a practical matter, expert guidance and common sense helps a lot.”Despite such issues, agentic systems like Design Conductor might accelerate chip design by accelerating iteration. They may also make design accessible to small teams that otherwise lack the resources or headcount to pull off a project.“It’s not at the point where you can have one person. I would say you still need five to ten, all experts in different areas,” says Ravi Krishna. “That team could get you to [a production-ready chip design] at this point.”